1. Field of the Invention
The present invention relates to a semiconductor memory and more particularly to a bipolar memory circuit.
2. Description of the Prior Art
A flip-flop circuit including resistors and diodes was employed in the memory cell of a conventional semiconductor memory. FIG. 1 is a circuit diagram showing a conventional memory cell in which resistors and diodes are employed. Collectors of transistors Q.sub.3 and Q.sub.4 are connected to a word line W.sub.i through parallel circuits consisting of resistors R.sub.0 and diodes D.sub.0, and resistor R.sub.0 ' and diodes D.sub.0 ', respectively. First emmitters of transistors Q.sub.3 and Q.sub.4 are connected to bit lines B.sub.n0 and B.sub.n1, respectively, while second emitters thereof are connected to a word line W.sub.in. This is a common arrangement of a flip-flop circuit. When the transistor Q.sub.3 is ON, the transistor Q.sub.4 is turned OFF, but when the former is OFF, the latter is turned ON. It is necessary that a certain voltage be applied to the resistors to prevent the flip-flop circuit, including the resistors and diodes, from malfunctioning or providing a wrong read-out due to noise. It is also necessary in this case that current flowing to the resistors in the cell be made small, or the resistance in the cell be made large so as to reduce the power consumption of the cell, and of the semiconductor memory as a whole. However, it has been difficult to obtain a large resistance value in a highly-integrated memory, or in a small-sized memory cell. Because the resistor must be made structurely long to obtain a large resistance, and thus, such a large-sized resistor could not be provided in a small-sized memory cell.
There are now employed I.sup.2 L and PNPN memory cells in which PNP transistors, for example, are used as loads instead of resistors. Transistors employed instead of resistors in a memory cell cause current saturation when they are ON, and store charges in the transistors, thereby achieving an anti-noise effect. This memory cell in which transistors were used instead of resistors achieves anti-noise and low power consumption effects, but had a problem in achieving a high speed write operation. The stored charges must be discharged at the time of the write operation and large current must flow, particularly at the time when changeover is made, i.e., from 0 to 1 or from 1 to 0. The speed is therefore made high by setting the write current larger than the read-out current. When the write current is set large, however, an extra write time period is needed corresponding to a time perid during which write current is increased. This is because the write operation is performed after the large write current, which is enough to change over the bit lines, i.e., after the write current applied to the bit lines reaches a sufficient level. This time period is influenced by stray capacitance, or the like, in the current switching transistors which serve to increase the current flowing through the bit lines. The capacitance effect of the stray capacitors of the transistors can be reduced by physically making the transistors small-sized, but such small-sized transitors can not serve to increase the current flowing through the transistors, thereby resulting in a low speed operation thereof.